Macro-Based Register Config Helper

Code

#include <stdio.h>
#include <stdint.h>

// --- Register Bit Field Configuration ---
// ENABLE: 1 Bit, Position 0
#define ENABLE_SHIFT  0
#define ENABLE_MASK   0b1 // Mask to ensure input is 1 bit (0 or 1)

// MODE: 2 Bits, Position 1
#define MODE_SHIFT    1
#define MODE_MASK     0b11 // Mask to ensure input is 2 bits (0-3)

// SPEED: 3 Bits, Position 3
#define SPEED_SHIFT   3
#define SPEED_MASK    0b111 // Mask to ensure input is 3 bits (0-7)

// RESERVED: Bits 6-7 are implicitly 0 because the register is initialized to 0
// and we only use OR operations on the other fields.

// 1. Define Macros to Set/Pack the Fields
// This macro takes the field data, clamps it using the MASK, and shifts it to the SHIFT position.
#define PACK_FIELD(data, SHIFT, MASK) \
    (((uint16_t)(data) & (MASK)) << (SHIFT))

// 2. Specialized Macros for Each Field
#define set_enable(data) PACK_FIELD(data, ENABLE_SHIFT, ENABLE_MASK)
#define set_mode(data)   PACK_FIELD(data, MODE_SHIFT, MODE_MASK)
#define set_speed(data)  PACK_FIELD(data, SPEED_SHIFT, SPEED_MASK)


uint16_t build_register(uint8_t enable, uint8_t mode, uint8_t speed) {
    // Initialize the 16-bit register to zero (ensuring RESERVED bits are 0)
    uint16_t reg = 0;
    
    // Use the macros and bitwise OR to combine the fields
    reg |= set_enable(enable);
    reg |= set_mode(mode);
    reg |= set_speed(speed);

    return reg;
}

int main() {
    uint8_t enable, mode, speed;
    
    // Read input values
    if (scanf("%hhu %hhu %hhu", &enable, &mode, &speed) == 3) {
        uint16_t reg = build_register(enable, mode, speed);
        printf("%u", reg);
    }
    
    return 0;
}

Solving Approach

 

 

 

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Input

1 2 4

Expected Output

37