71. Arithmetic Logic Unit

Perform basic arithmetic/logic on two 4-bit unsigned inputs.

Requirements

• Module: alu4
• Inputs: a[3:0], b[3:0], op[2:0]
• Outputs: y[3:0], cf
• Keep it fully combinational (no clocks, no delays).
• Use a width-safe add for ADD/SUB to capture carry/borrow.

Behavior

• Inputs: a[3:0], b[3:0], op[2:0]
• Outputs: y[3:0] (result), cf (flag: carry for ADD, borrow for SUB, 0 for logic ops)
• Opcodes
  • 3'b000 → ADD : {carry, y} = a + b, cf = carry
  • 3'b001 → SUB : y = a − b via two’s complement (a + ~b + 1), cf = borrow = ~carry_out
  • 3'b010 → AND : y = a & b, cf = 0
  • 3'b011 → OR : y = a | b, cf = 0
  • 3'b100 → XOR : y = a ^ b, cf = 0
  • others → y = 4'b0000, cf = 0 (reserved)