module error_checker_xz(
input [7:0] bus,
output reg all_known,
output reg has_unknown,
output reg [7:0] bus_if_known
);
always @(*) begin
// Default assignments (avoid latches)
all_known = 1'b0;
has_unknown = 1'b0;
bus_if_known = 8'h00;
// Check if bus has any X or Z
if (^bus === 1'bx) begin
// ^bus reduces bus bits using XOR; if any bit is X/Z, result is X
has_unknown = 1'b1;
bus_if_known = 8'h00;
end
else begin
all_known = 1'b1;
bus_if_known = bus;
end
end
endmodule