Learn fundamentals of Verilog
Wire
Task
Fan-Out Wire
Multiple Drivers
NOT Gate
OR Gate
AND Gate
XOR Gate
4-to-1 Multiplexer by Module Instantiation
XOR Gate Using Basic Gates
Splitting Vector
Vector Concatenation
Vector Bitwise Operators
Parity Checker
Logical Shifter
Elevator Indicator
Parking Lot Status
Binary to Gray Code Converter
Battery LED Bar
Open-Drain I2C SDA line
Open-Source Line using tri0
Single-Driver Data Line using uwire
Shared Line using wor
Divide-by-4 Tick Generator
One Shot Pulse
PWM with 4-bit Resolution
Parameterized LED Blinker
Board-Clock Configuration using Parameter Pass-Through
Signed vs Unsigned Compare
Half Added using NAND Primitive
Bus Error Checker