28. Divide-by-4 Tick Generator

How do you plan to solve it?

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt;
  always @(posedge clk) begin
    if (rst) begin
        cnt  <= 0;
        tick <= 0;
    end else begin
        
        // STEP 1: Decide tick
        if (cnt == 3)
            tick <= 1;     // 4th clock tick
        else
            tick <= 0;

        // STEP 2: Update counter
        if (cnt == 3)
            cnt <= 0;      // back to 0
        else
            cnt <= cnt + 1;

    end
end
endmodule