28. Divide-by-4 Tick Generator

When rst is high, we start the operation by initialising cnt to 0 and initialising tick to 1. Across the next few steps, in case cnt is not equal to 3 (2'b11), then cnt is incremented by 1. In case it reaches 3, then cnt is reset to 0 and tick is set to 1. This tick is reset in the next posedge cycle.

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg tick
);
  reg [1:0] cnt;
  always @(posedge clk) begin
    // Write your code here
    if (rst) begin 
      cnt <= 2'b00;    
      tick <= 1'b0;
    end else begin
      if (cnt == 2'b11) begin
        cnt <= 2'b00;
        tick <= 1'b1;
      end else begin
        cnt <= cnt + 2'b01;
        tick <= 1'b0;
      end    
    end
  end
endmodule