28. Divide-by-4 Tick Generator

How do you plan to solve it?

• Use a 2-bit counter that increments every clock.
• When the counter reaches 3, toggle the tick output; otherwise force it low.
• A ternary operator compresses the logic into one line.
• Reset initializes both counter and tick to known states.

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt;

  always @(posedge clk) begin
    if (rst) begin
      cnt  <= 2'd0;
      tick <= 1'b0;
    end else begin
      cnt  <= cnt + 1;
      tick <= (cnt == 2'd3) ? ~tick : 1'b0;
    end
  end
endmodule