28. Divide-by-4 Tick Generator

How do you plan to solve it?

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt;
  always @(posedge clk ) begin
    // Write your code here
    if(rst)begin
    tick<=1'b0;
    cnt<=2'd0;
    end
    else if(cnt==2'd3) begin 
    cnt<=2'd0;
    tick<=1'b1;
    end
    else begin
      tick<=1'b0;
      cnt<=cnt+1;
    end
    
  end
endmodule