28. Divide-by-4 Tick Generator

How do you plan to solve it?

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt;
  always @(posedge clk) begin
    if (cnt == 3) tick <= 1;
    else tick <= 0;
    cnt <= cnt + 1;
    if (rst) cnt <= 0;
  end
endmodule