28. Divide-by-4 Tick Generator

How do you plan to solve it?

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt;
  always @(posedge clk) begin
    // Write your code here
    // if(rst) begin
    //   cnt <= 0;
    //   tick <= 0;
    // end
    // else begin
    //   if(cnt < 2'b11) begin
    //     cnt <= cnt + 1'b1;
    //     tick <= 1'b0;
    //   end
    //   else begin
    //     tick <= 1'b1;
    //     cnt <= 2'd0;
    //   end
    // end
    tick <= rst ? 1'b0 : (cnt == 2'd3);
    cnt <= rst ? 2'd0 : (cnt + 2'd1);
  end
endmodule