28. Divide-by-4 Tick Generator

How do you plan to solve it?

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt = 0;
  always @(posedge clk) begin
    // Write your code here
    if (rst) begin
        cnt <= 0;
        tick <= 0;
    end
    else begin
        cnt <= cnt +1;
        tick <= 0;
        if (cnt == 3) begin
            tick <= 1;
            cnt <= 0;
        end
    end

    end
    
endmodule