28. Divide-by-4 Tick Generator

How do you plan to solve it?

module tick_div4(
  input  wire clk,
  input  wire rst,
  output reg  tick
);
  reg [1:0] cnt;

  always @(posedge clk) begin
    // Write your code here
    if(cnt != 2'b11) 
    begin
      cnt <= cnt + 1'b1;
      tick <= 1'b0;         // Pulse low on the other cycle
    end
    else
    begin
      cnt <= 2'b0;      // reset counter
      tick <= 1'b1;     // Pulse high on the 4th cycle
    end
  end
endmodule