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64. Full Adder

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Solving Approach

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Code

//==================================================
// Module: full_adder_struct
// Description: 1-bit Full Adder using two Half Adders and an OR gate
//==================================================

module full_adder_struct (
    input  wire a,
    input  wire b,
    input  wire cin,
    output wire sum,
    output wire cout
);

    // Internal signals
    wire sum1, c1, c2;

    // -------------------------
    // First Half Adder
    // -------------------------
    half_adder ha1 (
        .a(a),
        .b(b),
        .sum(sum1),
        .carry(c1)
    );

    // -------------------------
    // Second Half Adder
    // -------------------------
    half_adder ha2 (
        .a(sum1),
        .b(cin),
        .sum(sum),
        .carry(c2)
    );

    // -------------------------
    // OR gate for final carry
    // -------------------------
    or (cout, c1, c2);

endmodule


//==================================================
// Submodule: Half Adder
//==================================================
module half_adder (
    input  wire a,
    input  wire b,
    output wire sum,
    output wire carry
);
    xor (sum, a, b);
    and (carry, a, b);
endmodule

 

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