How do you plan to solve it?
module safe_div8 ( input [7:0] dividend, input [7:0] divisor, output [7:0] q, output [7:0] r, output div_by_zero ); assign q=(divisor)?(dividend/divisor):0; assign r=(divisor)?(dividend%divisor):0; assign div_by_zero=(divisor)?0:1; endmodule