module safe_div8 (
input [7:0] dividend,
input [7:0] divisor,
output reg [7:0] q,
output reg [7:0] r,
output reg div_by_zero
);
always @(*) begin
// default values (avoid latch)
q = 8'd0;
r = 8'd0;
div_by_zero = 1'b0;
if (divisor == 8'd0) begin
div_by_zero = 1'b1;
// q and r remain 0
end
else begin
q = dividend / divisor;
r = dividend % divisor;
end
end
endmodule