module safe_div8 (
input [7:0] dividend,
input [7:0] divisor,
output [7:0] q,
output [7:0] r,
output div_by_zero
);
// TODO: implement with ternary (?:)
assign q = (divisor==8'd0) ? 0: (dividend/divisor);
assign r = (divisor==8'd0) ? 0: (dividend%divisor);
assign div_by_zero = (divisor==8'd0) ? 1: 0;
endmodule