module safe_div8 (
input [7:0] dividend,
input [7:0] divisor,
output [7:0] q,
output [7:0] r,
output div_by_zero
);
// TODO: implement with ternary (?:)
assign div_by_zero = (divisor == 8'd0);
assign q = (div_by_zero) ? 8'd0 : dividend/divisor;
assign r = (div_by_zero) ? 8'd0 : dividend%divisor;
endmodule