module opcode_decoder (
input [3:0] opcode,
output reg [3:0] alu_op
);
always @* begin
casez (opcode)
4'b1???: alu_op = 4'b0001; // ADD
4'b01??: alu_op = 4'b0010; // SUB
default: alu_op = 4'b0000; // NOP
endcase
end
endmodule
casez treats z and ? bits as don’t-cares → perfect for opcodes with wildcards.casex also treats x as don’t-care, but ⚠️ this can mask real unknowns in simulation.default to avoid latches.casez for pattern-based decoders (efficient + safe).if–else chains — casez expresses intent directly and synthesizes cleanly.