How do you plan to solve it?
module alu_decoder ( input [1:0] opcode, output reg [3:0] alu_op ); always @* begin case (opcode) 0: alu_op= 4'b0001; 1: alu_op= 4'b0010; 2: alu_op= 4'b0100; 3: alu_op= 4'b1000; endcase end endmodule