How do you plan to solve it?
module alu_decoder ( input [1:0] opcode, output reg [3:0] alu_op ); always @* begin case (opcode) // Write solution here 2'd0:alu_op=1; 2'd1:alu_op=2; 2'd2:alu_op=4; 2'd3:alu_op=8; endcase end endmodule