How do you plan to solve it?
module alu_decoder ( input [1:0] opcode, output reg [3:0] alu_op ); always @* begin case (opcode) 2'b00: alu_op = 1; 2'b01: alu_op = 2; 2'b10: alu_op = 4; 2'b11: alu_op = 8; default: alu_op = 0; endcase end endmodule