30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(
    input wire       clk,
    input wire       rst,
    input wire [3:0] duty,
    output reg       pwm_out
);
    reg [3:0] cnt;
    always @(posedge clk) begin 
        pwm_out <= rst ? 1'b0 : (cnt < duty);
        cnt     <= rst ? 4'd0 : (cnt + 4'd1);
    end 
endmodule