30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic (clk, rst, duty, pwm_out);
input clk, rst;
input [3:0] duty;
output reg pwm_out;
reg [3:0] cnt;
always @ (posedge clk)
begin
    if(rst)
    begin
        pwm_out<=0;
        cnt<=0;
    end
    else 
    begin
    cnt<= cnt+1;
    if (cnt<duty)
    pwm_out<=1;
    else
    pwm_out<=0;
    end
end
endmodule