30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic(
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);
    reg [3:0] clkframe;
    always @(posedge clk) begin
        if (rst) begin
            pwm_out <= 4'b0;
            clkframe <= 4'b0;

        end

        else begin
            if (clkframe < duty) begin
                pwm_out <= 1'b1;
                clkframe = clkframe + 1;
            end

            else begin
                if (clkframe < 4'b1111)
                clkframe = clkframe + 1;
                else
                clkframe <= 4'b0;
                pwm_out <= 1'b0;
            end
        



        end

    end




endmodule