30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(  input clk, rst,
                    input wire[3:0] duty,
                    output reg pwm_out);
    reg [3:0] counter;
    always @(posedge clk) begin
        pwm_out <= rst ? 1'b0 : (counter < duty);
        counter <= rst ? (4'b0000) : (counter+1);
    end
endmodule