30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(

input wire      clk,
input wire      rst,
input wire    [3:0] duty,
output reg pwm_out
);

reg [3:0]  cnt;


// divide clk
always @(posedge clk) begin

    // on reset
    if(rst) begin
        cnt     <= 4'b0;
        pwm_out <= 1'b0;
    end

    // otherwise
    else begin

        
        if(cnt<duty) begin
            
            pwm_out <= 1'b1;      // keep pwm output to 1  

        end

        // otherwise
        else begin
            
            pwm_out <= 1'b0; // pwm low

        end

        cnt <= cnt + 4'b1; // increase counter by one
        

    end
end

endmodule