30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);

reg [3:0] counter;

always @(posedge clk) begin
    if (rst) begin
        pwm_out <= 0;
        counter <= 4'b0;
    end else begin
        counter <= counter + 1'b1;
        pwm_out <= (counter < duty);
    end
end

endmodule