30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic(
    input clk,
    input rst,
    input [3:0]duty,
    output reg pwm_out
);
reg [3:0]counter;
always@(posedge clk)
begin
    if(rst)
    begin
       counter<=4'b0;
       pwm_out<=1'b0;
    end
    else
    begin
        counter <=counter + 1'b1;
    if(counter<duty)
    begin
        pwm_out <=1'b1;
    end
    else begin
        pwm_out <=1'b0;
    end
    end
end
endmodule