30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(
    input clk,rst,
    input [3:0] duty,
    output reg pwm_out
);
    reg [3:0] state;
    always @(posedge clk) begin 
        if(rst) begin
            state<=4'd0; 
            pwm_out<=0;
        end
        else begin 
            pwm_out<=(state<duty);
            state<=state+4'd1;
        end

    end
endmodule