30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);

    reg [3:0]cnt;

    always @(posedge clk) begin
        cnt <= rst ? 1'b0 : (cnt + 4'b1);
        pwm_out <= rst ? 1'b0 : (cnt < duty);
    end

endmodule