30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic (
    input  wire       clk,
    input  wire       rst,        // synchronous active-high reset
    input  wire [3:0] duty,       // 0 to 15
    output reg        pwm_out
);

    reg [3:0] cnt;                // 4-bit counter (0–15)

    always @(posedge clk) begin
        if (rst) begin
            cnt     <= 4'd0;
            pwm_out <= 1'b0;
        end
        else begin
            cnt <= cnt + 1'b1;     // wraps automatically at 16

            if (cnt < duty)
                pwm_out <= 1'b1;
            else
                pwm_out <= 1'b0;
        end
    end

endmodule