30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic(
  input  wire       clk,
  input  wire       rst,
  input  wire [3:0] duty,      
  output reg        pwm_out
);
  reg [3:0] counter;

  always @(posedge clk) begin
    if (rst == 1'b1) begin
      counter <= 4'b0000;
      pwm_out <= 1'b0;
    end else begin

      counter <= counter + 1'b1;
      if (counter < duty)
        pwm_out <= 1'b1;
      else
        pwm_out <= 1'b0;
    end
  end
endmodule