30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic(
    input wire clk,
    input wire rst,
    input wire [3:0]duty,
    output reg pwm_out
);

    reg [3:0] cntr;

    always@(posedge clk) begin
        if(rst) begin
            cntr <= 4'd0;
            pwm_out <= 1'b0;
        end
        else begin
            if(cntr < duty) begin
                pwm_out <= 1'b1;
            end
            else begin
                pwm_out <= 1'b0;
            end
            cntr <= cntr + 1;
        end
    end
endmodule