30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic(
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);

reg [3:0] count;

always @(posedge clk)
begin
    if (rst) begin
        pwm_out <= 0;
        count <= 0; 
    end
    else begin
    count <= count + 1;
    pwm_out <= count < duty;
    end
end

endmodule