30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic
(
    input           clk     ,
    input           rst     ,
    input   [ 3:0]  duty    ,

    output reg      pwm_out 
);

reg [ 3:0] r_cnt;

always@(posedge clk) begin
    if(rst) begin
        r_cnt <= 4'd 0;
    end
    else begin
        r_cnt <= r_cnt + 1;
    end
end

always@(posedge clk)
    if(rst) begin
        pwm_out <= 1'b 0;
    end
    else begin
        pwm_out <= (r_cnt < duty) ? 1'b 1 : 1'b 0;
    end
endmodule