/*Write your code here*/
module pwm4_basic( input clk,
input rst,
input [3:0] duty,
output reg pwm_out );
reg [3:0] cnt;
always@(posedge clk or posedge rst) begin
if (rst) begin
cnt <= 0;
pwm_out <= 0;
end else begin
cnt <= cnt + 1'd1;
if (cnt < duty)
pwm_out <= 1;
else
pwm_out <=0;
end;
end;
endmodule