30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic (
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);
    reg [3:0] cnt_r;
    always @(posedge clk) begin
        if (rst)
            cnt_r <= 0;
        else
            cnt_r <= cnt_r + 1;
    end
    always @(posedge clk) begin 
        if (rst)
            pwm_out <= 0;
        else    
            pwm_out <= (cnt_r < duty);
    end
endmodule