module pwm4_basic ( pwm_out, clk, rst, duty);
input clk,rst;
input[3:0] duty;
output reg pwm_out;
reg[3:0] cnt;
always @(posedge clk) begin
cnt<= 4'b0;
pwm_out<= 1'b0;
if(rst) begin
cnt<=0;
pwm_out<=0;
end
else begin
cnt<=cnt+1;
if(cnt<duty) begin
pwm_out<=1;
end
else begin
pwm_out<=0;
end
end
end
endmodule