30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic(input clk, input rst, input [3:0] duty, output reg pwm_out);
    reg [3:0] counter; 
    always @(posedge clk) begin

        pwm_out <= rst ? 1'b0 : (counter < duty);
        counter <= rst ? 4'b0 : (counter + 4'd1);
    end
endmodule