30. PWM with 4-bit Resolution

How do you plan to solve it?

module pwm4_basic (
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);
    reg [3:0] in_count;

    always @(posedge clk) begin
        if (rst) begin
            in_count <= 1'b0;
            pwm_out <= 1'b0;
        end
        else begin
            //increase counter
            in_count <= in_count +1 ;
            if (in_count < duty)
                pwm_out <= 1'b1;
            else 
                pwm_out <= 1'b0;
        end
    end
endmodule