30. PWM with 4-bit Resolution

How do you plan to solve it?

/*Write your code here*/
module pwm4_basic (
    input clk,
    input rst,
    input [3:0] duty,
    output reg pwm_out
);

reg [3:0] count;

always @(posedge clk) begin
    if (rst) begin
        count   <= 4'd0;
        pwm_out <= 1'b0;
    end else begin
        count <= count + 4'd1;

        
        pwm_out <= (count < duty) ? 1'b1 : 1'b0;
    end
end

endmodule