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30. PWM with 4-bit Resolution

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Solving Approach

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Code

/*Write your code here*/
module pwm4_basic(
    input clk, rst,
    input [3:0] duty,
    output reg pwm_out
);
    reg [3:0] cnt;
    always @(posedge clk)begin
        if(rst) begin 
            pwm_out <= 0;
            cnt <= 4'b0000;
        end
        else begin 
            pwm_out <= (cnt < duty);
            cnt <= cnt + 1;
        end
    end

endmodule

 

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