module pwm4_basic(
input clk,
input rst,
input [3:0] duty,
output reg pwm_out
);
reg [3:0] cnt;
always @(posedge clk) begin
if (rst) begin
cnt <= 0;
pwm_out <= 0;
end else begin
if (cnt < duty)
pwm_out <= 1;
else
pwm_out <= 0;
if (cnt == 4'd15)
cnt <= 0;
else
cnt <= cnt + 1;
end
end
endmodule