Solving Approach

How do you plan to solve it?

Already everything is implemented you just need to call that function.

Functions should be kept for user to implement.

Code

module parity_and_reverse (
    input  [7:0] a,
    output       parity,
    output [7:0] rev
);
    // ---------- Predefined functions (do not modify) ----------
    function parity8;
        input [7:0] x;
        begin
            parity8 = ^x; // reduction XOR
        end
    endfunction

    function [7:0] reverse8;
        input [7:0] x;
        integer i;
        begin
            for (i = 0; i < 8; i = i + 1)
                reverse8[i] = x[7-i];
        end
    endfunction

    // ----------------------------------------------------------

    // TODO: Use the functions below
    // assign parity = ... ;
    // assign rev    = ... ;
    assign parity = parity8(a);
    assign rev = reverse8(a);

endmodule

 

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Testbench Code

`timescale 1ns/1ps

module tb_parity_and_reverse;
    // 1) Inputs
    reg  [7:0] a;

    // 2) DUT outputs
    wire       parity;
    wire [7:0] rev;

    // 3) Expected (prefixed expected_)
    reg        expected_parity;
    reg  [7:0] expected_rev;

    // 4) Mismatch (HIGH on fail)
    reg  mismatch;
    wire mismatch_w = (parity !== expected_parity) || (rev !== expected_rev);

    // Accounting
    integer TOTAL_TEST_CASES        = 0;
    integer TOTAL_PASSED_TEST_CASES = 0;
    integer TOTAL_FAILED_TEST_CASES = 0;

    // VCD limit
    integer VCD_MAX_CASES = 32;

    // DUT
    parity_and_reverse dut(.a(a), .parity(parity), .rev(rev));

    // ---------- Golden model (TB-only) ----------
    function [7:0] f_reverse8;
        input [7:0] x;
        integer i;
        begin
            for (i = 0; i < 8; i = i + 1)
                f_reverse8[i] = x[7-i];
        end
    endfunction

    // VCD dump (Inputs -> Outputs -> Expected -> Mismatch)
    initial begin
        $dumpfile("tb_parity_and_reverse.vcd");
        $dumpvars(0,
            tb_parity_and_reverse.a,                    // Inputs
            tb_parity_and_reverse.parity, tb_parity_and_reverse.rev, // Outputs
            tb_parity_and_reverse.expected_parity, tb_parity_and_reverse.expected_rev, // Expected
            tb_parity_and_reverse.mismatch              // Mismatch
        );
        $dumpon; // start at #0
    end

    // Header + init
    initial begin
        a = 8'h00; mismatch = 1'b0;
        expected_parity = 1'b0;
        expected_rev    = 8'h00;
        $display("   a    | parity rev  | exp_parity exp_rev | mismatch");
        $display("-----------------------------------------------------");
    end

    // Apply + check  (EXPECTED FIRST -> WAIT -> COMPARE)
    task apply_and_check;
        input [7:0] ta;
        begin
            a = ta;

            // Compute expected immediately from ta (no race)
            expected_parity = ^ta;
            expected_rev    = f_reverse8(ta);

            // now let the DUT settle and then compare
            #1;
            mismatch = mismatch_w;

            TOTAL_TEST_CASES = TOTAL_TEST_CASES + 1;
            if (!mismatch) TOTAL_PASSED_TEST_CASES = TOTAL_PASSED_TEST_CASES + 1;
            else           TOTAL_FAILED_TEST_CASES = TOTAL_FAILED_TEST_CASES + 1;

            $display("0x%02h  |   %0d     0x%02h |      %0d      0x%02h |    %0d",
                     a, parity, rev, expected_parity, expected_rev, mismatch);

            if (TOTAL_TEST_CASES == VCD_MAX_CASES) $dumpoff;
        end
    endtask

    integer i;
    integer seed;
    initial begin
        seed = 32'hF00D_1234 ^ $time;

        // Directed (≤32 rows total)
        apply_and_check(8'h00);
        apply_and_check(8'hFF);
        apply_and_check(8'h01);
        apply_and_check(8'h80);
        apply_and_check(8'h3C);
        apply_and_check(8'hC3);

        // Small sweep
        for (i = 0; i < 10; i = i + 1)
            apply_and_check(i[7:0]);

        // Random (keep rows ≤32)
        repeat (6) apply_and_check($random(seed));

        // Summary
        $display("-----------------------------------------------------");
        $display("TOTAL_TEST_CASES=%0d", TOTAL_TEST_CASES);
        $display("TOTAL_PASSED_TEST_CASES=%0d", TOTAL_PASSED_TEST_CASES);
        $display("TOTAL_FAILED_TEST_CASES=%0d", TOTAL_FAILED_TEST_CASES);
        $display("ALL_TEST_CASES_PASSED=%s", (TOTAL_FAILED_TEST_CASES==0) ? "true" : "false");

        #2 $finish;
    end
endmodule