50. 3-Way Selector

Solution using default value to avoid latch:

module selector3 (
    input  [7:0] a,
    input  [7:0] b,
    input  [7:0] c,
    input  [1:0] sel,
    output reg [7:0] y
);
    always @* begin
        y = 8'h00; // default, avoids latchiong behaviour

        if (sel == 2'b00) begin
            y = a;
        end else if (sel == 2'b01) begin
            y = b;
        end else if (sel == 2'b10) begin
            y = c;
        end
    end
endmodule

Solution using else block to avoid latch:

module selector3 (
    input  [7:0] a,
    input  [7:0] b,
    input  [7:0] c,
    input  [1:0] sel,
    output reg [7:0] y
);
    always @* begin
        
        if (sel == 2'b00) begin
            y = a;
        end else if (sel == 2'b01) begin
            y = b;
        end else if (sel == 2'b10) begin
            y = c;
        end else begin
            y = 8'h00;
        end
    end
endmodule

💡Remember

Latch inference happens only if some input cases don’t assign outputs.
With if–else, always include default assignments or a final else.
With the ternary ?: operator, the default is explicit in the last : clause — naturally latch-free.
Both styles synthesize to the same mux hardware.