How do you plan to solve it?
module selector3 ( input [7:0] a, input [7:0] b, input [7:0] c, input [1:0] sel, output reg [7:0] y ); always @(*) begin case (sel) 0: y = a; 1: y = b; 2: y = c; 3: y = 0; endcase end endmodule