Output Difference Analysis: For the first bit (D0), the difference uses just one XOR gate because there is no previous borrow to factor in. For the next bits (D1, D2, D3), the circuit uses two XOR gates in a row to calculate the value of the two input bits minus the borrow-in coming from the previous stage.
Output Borrow Analysis: The first stage borrow-out (Bout_0) is built by inverting A0 with a NOT gate and combining it with B0 using an AND gate. For the next stages, a borrow-out is created if the subtraction requires pulling from the next column. To keep the circuit small, the logic reuses the math from the first XOR gate, inverts it, and combines it with the incoming borrow along with the initial inverted input path.
Hardware Optimization: The circuit links four separate single-bit subtracting stages together. The borrow-out from each lower stage connects directly into the borrow-in of the next higher stage, allowing the borrow bit to pass along like a ripple from the first bit (D0) all the way to the final global Bout.