Digital Electronics - Basics
Number Systems
Quiz
Data Conversion
Binary Arithmetics
Binary Codes
Logic Gates
2-Input AND Gate
Task
Cascaded AND Network
2-Input OR Gate
Cascaded OR Network
Single Inversion
2-Input NAND Gate
2-Input NOR Gate
2-Input XOR Gate
2-Input XNOR Gate
Memory Module Select
Multiple Sensor Alarm System
Automatic Night Lighting Control
NAND Logic Synthesis
NOR Logic Synthesis
Equality Comparator Synthesis
Controlled Buffer/Inverter Synthesis
Transistor Level Logic Gates
NOT Gate using NPN BJT
NAND Gate using NPN BJTs
NOR Gate using PNP BJTs
NAND Gate using PNP BJTs
NOR Gate using NMOS Transistors
AND Gate using NMOS Transistors
NOT Gate using PMOS Transistor
OR Gate using PMOS Transistors
NOT Gate using CMOS
NAND Gate using CMOS
NOR Gate using CMOS
XOR Gate using CMOS
XNOR Gate using CMOS
Boolean Logic Simplification
K-Map Logic Optimization
Logic Blocks and Data Routing
3-Input Logic Optimization
Parity Bit Generator
Chip Select Expansion
Keyboard Matrix Encoder
4-to-1 Data Selector
1-to-4 Data Distributor
Combinational Arithmetic Circuits
Half Adder Design
Full Adder Design
Half Subtractor Design
Full Subtractor Design
4-Bit Modular Adder Block
4-Bit Modular Subtractor Block
2-Bit Multiplier
Signed Multiplier
1-Bit ALU Slice
Code Conversion Logic
Binary to Gray Code Converter
Gray to Binary Code Converter
BCD to Excess-3 Converter
Excess-3 to BCD Converter
Latches and Flip Flops-i
Latches and Flip Flops-ii
Implement SR Latch
Implement SR Latch with EN, PRE, CLR
Implement JK Latch with EN, PRE, CLR
Implement D Latch
Implement T Latch
Level Trigger vs Edge Trigger
Implement JK Master Slave Flip Flop
Storage Elements and Shift Registers
Digital Data Transmission
Design 4-bit right shift register using D FF
Design 4-bit left shift register using D FF
Design Synchronous Rising and Falling Edge Detector Circuit
Circuit Identification from the behavioural table
Design 4-bit SISO shift register
Design 4-bit PIPO storage register for ALU
Design PISO register for custom UART Transmitter
Asynchronous Counters
Synchronous Counters
Design 4-bit Asynchronous Up counter
Design 4-bit Asynchronous Down Counter
Asynchronous MOD-5 Down Counter
Design 4-bit Synchronous Up Counter
Design 4-Bit Synchronous Down Counter
Complete the Synchronous Down Counter for Launch Systems
3-Bit Synchronous Custom Sequence Generator
Multi-Scale System Clock Frequency Divider Circuit
Synchronous Slot Counter
Registers and Counters
Design 3-Bit Ring Counter with Clock-Gated Load Control
Modify the 8-Bit Johnson Counter with Synchronous Load and Shift Control
Digital Dice
Target Landing Game Controller
Custom PWM Generator
