module alu4 (
input [3:0]a,
input [3:0]b,
input [2:0]op,
output reg [3:0]y,
output reg cf
);
always@(*)begin
case(op)
3'b000 : {cf, y} = a + b;
3'b001 : {cf, y} = a - b;
3'b010 : begin y = a & b; cf = 0; end
3'b011 : begin y = a | b; cf = 0; end
3'b100 : begin y = a ^ b; cf = 0; end
default : begin y = 4'b0000; cf = 0 ; end
endcase
end
endmodule