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71. Arithmetic Logic Unit

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Solving Approach

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Code

module alu4 (
    input [3:0] a, b,
    input [2:0] op,
    output reg [3:0] y,
    output reg cf
);
    localparam [2:0] 
                ADD = 3'b000, 
                SUB = 3'b001, 
                AND = 3'b010,
                OR  = 3'b011,
                XOR = 3'b100;
    always@(*) begin
        case(op)
            ADD : begin {cf, y} = a + b;  end
            SUB : begin {cf, y} = a + ~b + 1 ;  end
            AND : begin y = a & b; cf = 0; end
            OR  : begin y = a | b; cf = 0; end
            XOR : begin y = a ^ b; cf = 0; end
           default : begin y = 4'b0000; cf = 0 ; end
        endcase
    end
endmodule

 

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